jun-wei wu

jun-wei wu

經理 @ Accton

About

I have more than 10 years experienced on Hardware design and Validation regions, with products on Gateway and Datacenter Switch respectively, and holds citizenship and working rights in TWN. I am currently leading 10 peoples over with HW validation / design times, with responsible for program PM role who serves as US CSP company products. The currently JD including Hardware design and created test plans on system level, troubleshoot with whole system product as well as cross-functional communication between internal teams and external venders. I am passionate for HW design / Validation and Test Automation as well as seeking for Product / System Validation, Production Engineer positions.

Country

Taiwan

City

Hsinchu City

Industry

Telecommunications

Skill

Test Validation, Hardware, Python

Experience

Accton

經理

Accton

LinkedIn
2019-10 - Present · 6 yrs 11 mos

台灣 Taiwan 新竹市

(1) Schematic design and layout with System board, bring-up and debugging. (2) US CSP Vendor DataCenter 400G/800G/TOR Switch Validation contact windows/Program PM. - System integration & FW validation items creation and review and troubleshooting, make sure product system behaviour & product performance can running at extremely application conditions. - Electronic integration validation items creation and review and troubleshooting, make sure Signal Quality and Power Quality of board level can match design requirements. - Cross-function with 3rd party & common-pool for MDVT, certification testing items executed and review and troubleshooting, make sure ME design are matching vibration criteria and get certification approval. - Determined PVT and ESS testing requirements and analysis failure data by production build and doing root cause analysis to improve yield rate. - 2nd source category based on different type components and executed validation process. (3) Management / Handling HW Validation dept. of Datacenter Switch products. (4) Switch product rack-level building and routing by DAC & fiber as well as executed OCP3 power entry testing by each of bus bar power variation as well as created automation tools for auto-upgraded FW/SW for DUTs upon rack and monitor DUTs status. (5) Testing Automation creation -Created PDU Control / I2C & SPI Timing Capture / Chamber Control for long-term power cycle, temperature and Signal Validation used.

European brand Company

Sr. Hardware Engineer

European brand Company

2018-6 - 2019-9 · 1 yr 4 mos

Taipei–Keelung Metropolitan area

(1) Coordinated & Cooperation with JDM partner of HW Design / Layout / Test reports on Network products. (2) Technical support with Network WAN performance tunning, certification issues and production debugging.

MitraStar Technology

Sr. Hardware Engineer

MitraStar Technology

LinkedIn
2012-7 - 2018-5 · 5 yrs 11 mos

新竹地區

Sunplus

System Engineer

Sunplus

LinkedIn
2008-3 - 2012-2 · 4 yrs

新竹地區

Education

National Taipei University of Technology

National Taipei University of Technology

LinkedIn

機電整合工程研究所電機組

2006-9 - 2008-2 · 1 yr 6 mos

jun-wei wu's Contact Information

Email

******@***.com

Phone

(**) *** ****

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