jonathan chung

Founded Hong Kong start-up providing customized end-to-end remote site monitoring solutions in harsh outdoor locations. Our low power wireless monitoring system has been deployed in mission critical government and railway infrastructure projects such as flood detection and trackside gate monitoring. Develop wireless sensor network module firmware including key features such as low power routing nodes, highly fault tolerant mesh network, over-the-air firmware upgrade and web clients. Led team on hardware electrical and mechanical design and production effort. Manage key project accounts, including site survey and system design, quotation and proposal, development and delivery scheduling, and quality control compliance. Drove business development efforts including landing key project through distributorship and Hong Kong Science and Technology Park Incubation Program admission process.

* Worked with Marketing on product family architecture decision in 40nm node * High Speed Serial Interface feature definition and system integration in 28nm FPGA families with emphasis on optimisation and ease-of-reuse across multiple product lines.

* Worked within a small team, as the initial design engineer on board, to help build the new Hardcopy business unit, a new line of Structured ASIC offering seamless migration from FPGA prototypes with reduced die size and power consumption. * Performed key engineering roles in successful roll-out of 3 generations of the family products, contributing in planning, circuit design and verification, FPGA conversion flow methodology, test chip design and characterization. * Supported on customer design issues and contributed to successful tape-outs of early critical accounts. Provided training and documentation to Sales and Application team to facilitate knowledge transfer. * Worked effectively with different departments and design teams in U.S. and Malaysia locations.

* Contributed on several generations of FPGA development, from 0.5μm to 0.13μm node. * Worked on and managed team on development of multiple FPGA devices, including schematic capture, timing, functional and logic verification, layout guidance, die size estimate, thermal analysis, and pintable generation. * Circuit designs on Memory and IO buffers for new features or performance improvement, including a U.S. patented high-speed differential input buffer.