John Harwell

- Architect and develop ultra-low latency, high-throughput software systems for unsupervised machine learning in edge and embedded environments. - Improve efficiency, robustness, and scalability of core ML algorithms under strict compute, memory, and latency constraints. - Design and implement high-performance streaming data pipelines for real-time signal processing applications, including cognitive electronic warfare and smart grid monitoring. - Lead system-level architecture decisions, balancing performance, reliability, and maintainability across complex deployments. - Translate research-driven algorithms into production-grade systems capable of operating reliably in noisy, resource-constrained environments. - Drive performance optimization across the stack, from algorithmic design to systems-level implementation.

- Developed high-performance algorithms and software for real-time signal processing and analysis in defense and autonomous systems applications. - Designed and implemented systems for operating under adversarial, uncertain, and data-constrained environments. - Applied advanced modeling and algorithm design (including multi-agent / decentralized approaches) to solve complex coordination and inference problems. - Built scalable and efficient implementations of research prototypes, bridging the gap between theory and deployable systems. - Collaborated across multidisciplinary teams to deliver production-ready solutions under tight performance and mission constraints.

- Designed and implemented backend systems supporting satellite-based positioning and timing services in GPS-denied environments. - Developed robust, high-reliability software for processing and distributing timing/location data at scale. - Improved system performance and fault tolerance in distributed service architectures operating under real-world constraints. - Contributed to system architecture and deployment strategies for globally distributed infrastructure. - Focused on reliability, correctness, and resilience in safety- and mission-critical systems.

- Developed algorithms and software systems in areas such as multi-agent systems, autonomy, and intelligent decision-making. - Designed and evaluated decentralized coordination strategies for complex, distributed environments. - Built simulation and experimental frameworks for testing algorithm performance under realistic conditions. - Transitioned research concepts into working prototypes and applied systems. - Contributed to DARPA/DoD-style research efforts involving high-complexity, high-uncertainty problem domains.

- Derived cuboid structure model using graph theory to develop simple algorithms to provably manipulate graphs (structures) from one state to another. - Demonstrated robust predictions of steady-state collective foraging behaviors up to practical engineering limits using differential equation modeling. - Showed that the origin of collective intelligence in task allocating swarms lies in self-organized learning task relationships, rather than costs. - Reduced development cycles and increased utility of automated design methods through better measurements for design principles of multi-agent systems.

Co-investigator on internal research grant investigating the application of massively parallel genetic algorithms to Lattice-Boltzmann method fluid flow simulations. Research involves novel dynamic simulation data transformation techniques and adaptive code evolution/generation in order to efficiently exploit temporal phasing. Developed high-reliability flight software for use on unmanned aerial vehicles and satellites using RTEMS embedded RTOS and the C programming language. Maintained expansive reusable flight software library. Performed hardware integration and driver development for FPGA, I2C, RS-232/RS-422, and SpaceWire interfaces. Assisted in design, architecture, and implementation of prototype software for tethered UAV research using ROS.

Worked as a digital design engineer, performing tasks such as prototype development board layout, integration and test, and ASIC design.