Jared Reiss-Lavoie

-Developed production firmware in C for an ARM Cortex MCU to configure Ethernet PHYs, supporting 100+ I/O protocols. -Created a custom MDIO serial driver using RP2040 PIO, boosting configuration speed >150% vs I2C. -Brought up a Xilinx Versal Prime ACAP-based FPGA module card, writing Python scripts to test LPDDR4 ECC SDRAM memory access. -Led debug efforts on a critical 40GbE system for a defense customer – identified root cause and interfaced directly with chip vendor. -Built an automated Python tool overlaying ASCII masks on PHY eye-diagrams for IEEE compliance, used company-wide. -Designed the schematic for a Front Transition Module for automated test equipment with an integrated CM3 and led product design meetings to coordinate development with downstream teams. -Designed the schematic for a 6U VPX carrier card with an onboard IPMC, tailored for defense applications. -Developed a USB 3.1 to 10/100/1000 Ethernet controller with RGMII, designing the schematic in DxDesigner, the PCB in KiCad, and leading chip bring-up.

-Built a Tkinter-based Python application for tracking EMC tests across 25+ team members. -Created test plans and performed schematic reviews for ultrasonic sensors and HVAC pumps. -Researched sensor usage across forest/construction to support roadmap planning for senior engineers.

Minor: Computer Science