Ganesh Prasad Pai K

Physical Design Engineer @ Intel

Country

City

India

Industry

Semiconductors

Skill

ICC, ICC2, Synopsys Design Compiler, Cadence Virtuoso, Verilog, VLSI, TCL, Cadence Abstract, Cadence Encounter, DRC, Perl Script, LVS, Cadence Skill, C, Perl, ASIC, EDA, Static Timing Analysis, Physical Design, Very-Large-Scale Integration (VLSI)

Experience

Physical Design Engineer

Intel

2022-2 - Present · 4 yrs 8 mos

Bengaluru, Karnataka, India

Senior Application Consultant

Synopsys Inc

2019-2 - 2022-1 · 3 yrs

Korea

Supporting Samsung Korea with their Mobile-AP T/Os on latest technological nodes.

Technical Lead

Samsung India

2018-3 - 2019-1 · 11 mos

Bengaluru Area, India

- Benchmarking of libraries through P&R using ICC/ICC2 on full chips - Testchip development for SRAM silicon validation - Standard Cell Library Architecture, Milkyway and LEF Generation & QC - Team building , Training and Mentoring

Lead Engineer

Samsung India

2016-3 - 2018-3 · 2 yrs 1 mo

Bangalore

- Started working on testchip development( from Synthesis to GDS out) for silicon validation of SRAM IP. Worked and taped out multiple testchips. - Responsible for Library Qualification & Improvement through PnR & Synthesis and feedback - Responsible for team building by ramping up new members of the team and continuous mentoring

Senior Hardware Engineer

Samsung India

2014-10 - 2016-3 · 1 yr 6 mos

Bangalore

- Joined Samsung Semiconductors India as one of the initial members of a brand new team responsible for Standard Cell Library Development under Samsung's latest technological nodes - Complete Ownership of LEF & Milkyway Flow creation, deliverable generation and quality checking for multiple libraries - Co-owner of Layout Architecture Development for library development from scratch

Senior Design Engineer

HCLTech

2011-7 - 2014-9 · 3 yrs 3 mos

Hubli Area, India

As a member of Standard Cell Library Development team worked on Layout Architecture & Development, LEF Generation and QC, Place & Route for evaluation of layouts over varied technological nodes