
Francesco Patané
Senior Engineer of Parametric Test @ STMicroelectronics Italia
About
As Device Senior Engineer member, under Catania ST R&D Power and Discrete Organization, I support the team on the first phase of new technology development and then qualification whit parametric test debugging and qualification. Now devoted of semiconductors like SiC and GaN. Experience of measure for many technologies: Diode, Bipolar, Darlington, Mesa, Pmos, Mos, ViPower M0 & M1, HSB2, LDMOS, BIP2, SiC Diode, Super Junction, SiC PowerMos, GaN Power, Gan RF. Principal for parametric test on wafer level. One patent active and 3 in write. CEI Technical support.
Italy
Catania
Semiconductors
IEC Collaboration of International Electrotechnical Commission, Research and Development (R&D), Technical Support, Coaching & Mentoring, Interpersonal Communication, Emotional Intelligence, Wellness, Increase Productivity, Note Taking, Time Management, Persuasion
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