Francesco Carbone

HW\FPGA Designer: • Design, development, schematic-entry of Analog\Digital Embedded Systems; • PCB Layout Support; • Analog Frontend Spiece and PCB SI Pre-Layout and Post-Layout Simulations; • FW support for BSP \ Boot development; • FPGA development; • Development of specific tests and support scripts for the Basic Unit Test; • Basic Unit Test of the electronic board.

- Design, development and verification of microprocessor\microcontroller chipsets in telco embedded systems (for internal proects). • Design, development, schematic-entry of Digital Embedded Systems; • PCB Layout Support; • SI Pre-Layout and Post-Layout Simulations; • FW support for BSP \ Boot development; • Development of specific tests and support scripts for the Basic Unit Test; • Basic Unit Test of the electronic board. - PCB SI Simulator in Python (Python course internal proect).

Embedded Systems HW Consultant. Design, development and verification of microprocessor\microcontroller chipsets in telco embedded systems. Projects: 1) Design and development of electronic actuator monitor board for Electromechanical Actuator in avionic systems. 2) Design and development of communication RS485\RS422 "switch" board for Electromechanical Actuator in avionic systems. Activity and responsibilities: o Writing the Design Specification; o Components evaluation and selection; o Schematic Entry implementation; o Layout constraints implementation and support to PCB layout team.

Projects: 1) Design, development and verification of digital chipset of a Switch Ethernet Board to support PDH & Ethernet traffic in a rack-based Traffic Node (NPU1D). 2) Design, development and verification of digital control&traffic chipset of a stand-alone “Low Cost” Switch Ethernet Modem Board for the PDH & Ethernet Traffic Node (CN510R2). 3) Design, development and verification of digital control&traffic chipset of a Switch Ethernet board prototype to verify HW\FW platform’s performace and evaluate if it can be used as reference platform for “master unit” functionality in a rack-based Traffic Node System (NPU1x FUM). 4) Design, development and verification of digital control&traffic chipset of a stand-alone Modem Board for the PDH & Ethernet Traffic Node (CN510R1). 5) Design, development and verification of digital control&traffic chipset of an “agile” stand-alone\rack-based Modem Board for the PDH Traffic Node (CS). 6) Verification of an Altera StratixII’s FPGA that implement XPIC functionality (Cross Polar Interference Cancellation) in the Modem board for Basic Traffic Node. 7) Design, development and verification of an ATM Switching Board for the Minilink Traffic Node (rack-based system) supporting IMA function on ATM group (AAU). Activity and responsibilities: o Writing the Design Specification; o Schematic Entry implementation; o Layout constraints implementation and support to PCB layout team; o Pre-Layout and Post-Layout simulation o Writing the Verification Strategy and Verification Specification; o Testbench implementation and board verification; o CLI test scripts implementation to support board verification; o Boot and BSP firmware team support; o Verification report of the test results.

Projects: 1) Redesign HW of the XDB Switch Board for AXE Platform in order to meet the RoHS directives (XDB DfE). Activity and responsibilities: o Schematic Entry implementation; o Layout constraints implementation and support to PCB layout team. o Writing Verification Strategy and Verification Specification; o Testbench implementation and board verification; o CLI test scripts implementation to support board verification; o Script Machine scripts implementation for automatic board verifcation ; o Verification report of the test results.

Projects: 1) Design and development of Elevator Control System Board (master board and slave boards) for Simplex/Multiplex Building Elevator system architecture. 2) Design and development of Embedded System Board for battery/virus recognition with CCD and Led technology in medical applications. Activity and responsibilities: o Writing System Requirements and Design Specification with customer support; o Embedded systems architecture and schematic design; o PCB layout design (2\4 layer boards); o Analog front-end PSpice simulation; o Board manufacturing management and component selection; o FW design for Embedded systems; o Writing Verification Strategy and Verification Specification; o Testbench implementation and board verification; o Verification report of the test results; o Team leader for the Embedded Systems Test team; o Team leader for the Embedded Systems Maintenance team.

Projects: 1) Project ”CASSA_2000”: paytoll self service machine for superhighway. 2) Project ”ECP500”: pipe controller self service machine for Post-Office. 3) Project ”ATM2000”: bancomat machine for banks. 4) Project ”AEROCASH”: bancomat machine for banknote remote pneumatic distribution from the caveau banks. 5) Project ”COINBASKET”: coin recognition equipment with electromagnetic sensors. 6) Project ”ETF500” and ”ETF2000”: self service machines for ticket railway payment. Activity and responsibilities: o Writing Design Specification; o Board architecture design and schematic development; o FPGA and CPLD design; o PCB layout design (4 layer boards); o Analog front-end PSpice simulation; o Board manufacturing management and component selection; o FW design for Embedded systems verification (C\Assembly code HAL Layer); o Writing Verification Strategy and Verification Specification; o Testbench implementation and board verification; o Verification report of the test results; o Manufacturing test-bench design and support.

Production & Maintenance of the Energy Generator. Activity and responsibilities: o Implemetation of electrical and mechanical assembly of energy generator

University Stage Project: ”Banknote Acceptor”. Banknote recognition equipment with CCD image sensor. Activity and responsibilities: o Board architecture design and schematic development; o FPGA architecture design and schematic entry development; o Writing Verification Strategy and Verification Specification; o Testbench implementation and board verification; o FW verification team support; o Verification report of the test results.

Degree thesis: "Project and Implementation on FPGA of a system for automatic error correction of the disuniformity in the commercial CCDs”