eldon nelson

eldon nelson

verification application engineer

About

Eldon Nelson is a Verification Application Engineer working at Synopsys. He received his B.S. and M.S. degree in electrical engineering from the University of Minnesota and is a licensed Professional Engineer (P.E.). Eldon's technical blog tenthousandfailures.com features posts on verification and GNU Emacs - two of his favorite topics. Before working at Synopsys he has worked for: Intel, Micron Technology, IBM, Unisys, and the National Science Foundation. Specialties: SystemVerilog, UVM, ASIC Floorplanning, Python, TCL, Linux, IBM ASIC Back End Design

Country

united states

City

rochester

Industry

computer hardware

Skill

systemverilog, universal verification methodology, hardware verification, asic, tcl, linux, vlsi, python, verilog, physical design, cadence, floorplanning, hardware, perl, ruby, logic synthesis, testing, debugging, application specific integrated circuits, ruby on rails, django, uvm, very large scale integration

Experience

ibm

intern

ibm

2004-5 - 2005-1 · 9 mos
unisys

intern

unisys

2003-1 - 2003-9 · 9 mos

Full time co-op at Unisys in hardware engineering department for eight months. Worked on physical timing violation investigation and designing tools for automation of processes.

university of minnesota

summer research intern

university of minnesota

2002-6 - 2002-8 · 3 mos

Sponsored by UMN and National Science Foundation. Designed a DMA controller for the Motorola 68HC12 Microcontroller. Paper with solution went on to win 2nd Place IEEE Regional Paper Contest.

micron technology

verification engineer

micron technology

2011-4 - 2015-8 · 4 yrs 5 mos

Using SystemVerilog and UVM to verify functionality of custom ASIC designs. Adding new functionality to the test environment and assigning failures to owners. Active in expanding the reporting and coverage capability to better solve verification requirements.

ibm

engineer

ibm

2005-5 - 2011-4 · 6 yrs

Responsible for floorplan and layout of ASIC semiconductors. Placement, wiring, timing closure and integrating logic changes from designers into design – signs off on final chip for fabrication that conforms to all physical design checklists. Various roles from physical design lead to physical design methodology lead. To just the guy who gets stuff done. Customer facing engineer on multiple projects as an advisor and as an implementer on third party processor design layout.

synopsys

verification application engineer

synopsys

2017-7 - Present · 9 yrs 2 mos
intel corporation

verification engineer

intel corporation

2015-8 - 2017-7 · 2 yrs

Verification Engineer at Intel Corporation

Education

university of minnesota

university of minnesota

electrical engineering

2005-1 - 2009-1 · 4 yrs 1 mo
university of minnesota

university of minnesota

electrical engineering

2000-1 - 2005-1 · 5 yrs 1 mo

Activities and Societies: Region 4 Student Representative for IEEE 2002-2004, President of IEEE UMN Student Branch for 2003/2004 School Year, Co-President of Manga Anime Society at the U of MN 2000-2003, Member of HKN Electrical Engineering Honors Society, Member of UMN Institute of Technology Student Board 2003/2004 School Year

eldon nelson's Contact Information

Email

******@***.com

Phone

(**) *** ****

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