Devesh Nema

Developed Infotainment SystemUI in Android (AOSP) - built and extended framework components

● Lead architect for next generation flagship product to analyze chip power (~20K users) - Implemented front-end GUI in Java Swing/JIDE with data agnostic views and back-end driven views creation – scaled and parallelized development, shortened product’s time-to-market by 50% - Architected overall system design – architecture patterns, design decisions, technology used, libraries and make files - Defined and developed C++ and Java APIs for SWIG interface - Designed generic and scalable Google Protobuf schemas for data-serialization - Reduced installer disk-space footprint by 10x by re-architecting libraries and data files dependencies in legacy build system. Reduced tool bring up time by 45% and tool installation time by 50% - Collaborated with key stakeholders to form 2-year project plan for product roadmap, timelines and inter-dependencies ● Project lead and architect for tool to visualize, debug and correlate chip hardware and software models - Developed GUI in Java Swing/JIDE with innovative graphical visualizations, view cross-probing and automated debugging – improved user experience to verify model correlation, shortened debug cycle and reduced time-to-market - Implemented C++ back-end data models for GUI visualizations - Collaborated with key stakeholders in collecting product requirements and lead Agile sprints ● Architected GUI to interactively visualize and analyze Network-on-Chip (NOC) performance - Developed GUI in Tcl/Tk – graphical visualization of NOC topology, overlay of routing and simulation results, heat-maps, interactive what-if analysis - Implemented GUI dashboard and widgets in Java Swing/JIDE – configure results to visualize, apply data filtering on results displayed, drag-and-drop to arrange widgets in dashboard - Implemented innovative topology visualization model in C++, using Google Protobuf to serialize graphical data - Designed APIs and Google Protobuf schema for generic and scalable interfacing with C++ back-end

● Implemented GUI in Tcl/Tk to visualize chip layout – enabled early debugging and reduced overall development cycle by 25% ● Implemented GUI dashboard in Tcl/Tk to improve accuracy of delay estimator tool by 10% ● Enhanced C++/Tk GUI for chip layout visualization to support graphical editing – improved layout generation time by 5% ● Implemented C++ model abstractions for chip and its components ● Developed automation flow, tools and checkers for translating hardware model into software model ● Reduced software model memory footprint by 18% by updating data-types based on their ranges ● Reduced bitstream size by 15% by replacing duplicate frames to references ● Implemented C++ bitstream encryption, authentication and advanced security features ● Implemented C++ smart-differ for bitstream – enabled parallel debugging for different sub-systems

ANSYS develops engineering simulation software used to predict how product designs will behave in real-world environments. Built the Graphical User Interface in Qt(C++) for a new Electronic Design Automation (EDA) software tool from scratch and integrated it with the back-end. Early adoption by Tier-1 customers. Worked on new features and performance improvements of the chip physical layout modeling tool. Developed an understanding of hierarchical data modeling and processing. Developed Graphical User Interfaces in TCL/Tk to aid Apache's flagship products (RedHawk, PathFinder, Totem) in providing visualization of analysis results. Lead to an improved user experience, customer productivity and enhanced tool features. Developed several auxiliary scripts in TCL for tool flow automation, easier user design debugging, results analysis and improved productivity

Provided technical support for Apache’s flagship tools for power grid integrity and reliability analysis - RedHawk and Totem. Helped in account proliferation, growth and integrating Apache tools into customer flows and methodologies, including company’s biggest customers. Involved in pre-sales and post-sales customer support including product evaluations, consultancy services and product benchmarking for advanced technology nodes. Implemented several new features as prototypes in TCL and worked with software team in productizing them. Experience in Technical Sales and Product Marketing for EDA tools Identified customer applications and worked closely with R&D in providing product enhancement specs and ideas.

Optimized a 5-GHz VCO for active compensation of supply noise in 45-nm SOI technology. Published a paper "Active Compensation of Supply Noise for a 5-GHz VCO in 45-nm SOI Technology" for IEEE International Symposium on Circuits and Systems (ISCAS 2008).

Developed debugging utilities in CLIPS/CAPE for a System-on-Chip RTL Integration Expert System.

Academic Projects- SATISFIABILITY (SAT) SOLVER Developed a SAT solver in C++ using static and dynamic branching heuristics, two literal watching and clause learning. OPTICAL PROXIMITY CORRECTOR (OPC) Implemented Edge based and Model based OPC in MATLAB using simulated annealing. SPRINKLER BUDDY Project involving gate level description, schematics design, layout and LVS of an IC to control the flow of water through sprinklers. Won the ‘AMD Best Design Award’ in a team of 5 students. OPERATIONAL AMPLIFIER Designed a low-speed high-accuracy operational amplifier in 90 nm technology. Made the layout for the operational amplifier.