David Kliebhan
Sr. FPGA Design Engineer @ Mantaro Networks, Inc.
About
Expertise in FPGA, ASIC, software, PCB, and product design. • DSP, complex data paths, state machines, modelling • SoC implementations, embedded software • Video, RF, datacom, serial interfaces • Verification, hardware debug, manufacture test • VHDL, Verilog, C, C++, C#, MATLAB, Python
United States
Greater Philadelphia
Defense & Space
ASIC, Digital Signal Processing, VHDL, Application-Specific Integrated Circuits (ASIC), Python (Programming Language), Embedded C++, Embedded Software, C (Programming Language), RTL Design, FPGA Development, PCB Design, C#, Matlab, Product Management, New Product Design, Entrepreneurship, Verilog, C++, FPGA, Electronics
Experience

Sr. FPGA Design Engineer
Primary FPGA contributor to space-time coding instrument. • Custom VHDL programmable calculator for complex-valued matrix operations • Calculator syntax, compiler, and coding • Frequency, phase, and amplitude estimations • Nelder-Mead and Golden Section search algorithms • Python modelling, verification • VHDL Quartus, Modelsim

FPGA Design Engineer
GEOST, a LightRidge Solutions Company
Developed DSP firmware for SDA satellite payload. • IIR filter, threshold calculation, pulse detection and measurement • Python modelling, verification • VHDL, Vivado, Python, Xilinx Zynq-7000

Founder, CTO, Lead Developer
AccuTennis
Greater Philadelphia Area
Lost a match on a bad call and AccuTennis was born. Originated an innovative line call and player development system for tennis courts. Primary contributor to system architecture, hardware, and software implementation. Product description and videos at accutennis.com. • Created the overall concept, technologies, and business model • Developed custom camera PCBs, VHDL, and C++ on Cyclone V SoC • Coded C++/OpenCV on Raspberry Pi • Coded C# system-level processing and simulation environment – real-time object filtering, correlation, identification, physics, tracking; calibration; match and drill automation; stats, analysis, video clip generation; scoreboard data, plots, video playback, mirroring; voice prompts; player gesturing; UI processing; db design and interfaces; system setup, configuration, diagnostics, management, error handling, and reporting • Coded Python scoreboard server and graphics • Supervised UI app and back-end website • Designed front-end website • Created interactive drills with voice and scoreboard prompts • Pitched and sold company to investors • U.S. Patent 9,737,784

Sr. ASIC Design Engineer
Sandgate Technologies, Inc.
Downingtown, PA
Developed data link layer and IPsec functionality for full-stack TCP/IP hardware acceleration ASIC.

Sr. ASIC Design Engineer
Netvantage, Inc.
Allentown, Pennsylvania
• Lead engineer for multi-port Ethernet MAC ASIC • Contributed to Ethernet switch ASIC

Sr. Design Engineer
Quanta Research, Inc.
Fort Washington, PA
• Developed HDL for ATM switch and network adaptor ASICs • Lead hardware engineer for desktop switch product line
David Kliebhan's Contact Information
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