Daniele Valenza

As Product Engineer, my role is to make link between chip design, testing, and mass production, with a predominant focus on quality, yield optimization, test cost reduction and implementing advanced testing methodologies. Experience with ATE (Automated Test Equipment): Familiarity with test platforms like Teradyne, Advantest, and the ability to write and debug test programs (in languages like C++, Visual Basic, Java). To ensure adherence between Test Solution and defined Guidelines for the product Family and Mission Profile. To analyze test data from wafers and finished devices to identify failure patterns and the root causes of defects (e.g., process defects, design issues, etc.). To seek ways to make testing more efficient, both in terms of execution time and complexity. To troubleshoot problems that arise during high-volume production. To quickly isolate the root cause of complex failures. To collaborate with design, manufacturing, quality, and sales teams. To support product qualification activities, which include long-term reliability testing to ensure the chip maintains its performance over time and under various environmental conditions.

To develop and update the library of software generators used to generate Parametric Cells (pCells) for the Design kits (DKs) of ST processes. To develop and update software utilities to help designers to generate complicated analog layout structures made with Smart Power DKs. To define, prepare and take training sessions about the use of the pCells generators and layout utilities delivered in the Smart Power Design Kits. To improve the quality of the documentation provided in pCells environments. To develop procedures to automate the execution of the Quality Assurance (QA) of the pCells. To develop and maintain an internal Software used for Thermal analysis on the power mos.

Development of a new model describing the radial yield effect of BCD technology devices on wafer. The goal of this project, was to demonstrate the radial dependence to the yield.