Christoph Albrecht

Autoformalization of mathematical theorems and proofs. • Developed chess playing agents with OpenAI Agent SDK and Stockfish to demonstrate trace logging in the Morph Labs environment. • Prototyped a first version for the new Math.Inc Gauss app.

Platform Infrastructure Engineering for Accelerator Systems and ML Supercomputers: • Enhanced the resiliency of large scale Tensor Processor Unit (TPU) systems for large language model training and inference.

• Developed a new moving sorter induction strategy, enhancing robot station deployment capabilities. • Built and improved automatic tools for analyzing robot system performance, leading to targeted enhancements. • Fine-tuned and evaluated machine learning models for segmentation, object recognition, and grasp generation. • Enhanced motion planner for 6 degree-of-freedom robots, optimizing operational efficiency.

Motion planning for the autonomous vehicle. I worked in the Speed team and also with the Spacetime Search team. I focused on discomfort versus progress trade-off and worked on the interaction with reactive agents. I contributed to the working group on intersections for urban driving.

I worked in the Search Infrastructure Team on the analysis of the search components and on capacity planning. In the Storage Analytics Team I worked on using flash memory in addition to disk drives for globally distributed storage systems. Then I worked in the Network Architecture Team on the optimization and analysis of Google's backbone networks.

As a researcher I worked closely with the business units (product improvements through direct code contributions), focused on advanced projects and was involved in the research community to increase the technical visibility. My projects were on sequential optimization techniques, balanced clock latency scheduling, retiming and clock gating for Cadence RTL Compiler, Cadence flagship product in logic synthesis, and timing analysis with SoC Encounter. I was part of the research leadership team of the lab and coordinated projects of the implementation group for logic and physical synthesis.

I worked on algorithms for logic synthesis used in Synopsys Design Compiler.

At the institute we developed the BonnTools, a set of physical design tools (placement, routing, timing optimization, clock tree synthesis) which were used by IBM for the design of mainframe and ASIC chipsets. More than a hundred chips were designed with these tools and we achieved excellent results due to a flat design approach with state of the art combinatorial optimization algorithms.

Discrete mathematics and combinatorial algorithms. In my Ph.D. thesis I extend the latest results for multi-commodity flow approximation algorithms and used these to develop a global routing program for physical VLSI design. The tool was used by IBM for the design of the latest processor chips and ASICs and achieved significant improvements.