chrishneel ram

macos release validation and sw triage manager

About

A strong leader at Apple, with experience in macOS release and SW triage across multiple Apple products. Experience in Power and Performance engineering and pre-/post-silicon validation at Intel Corporation, spanning a large variety of projects and markets. Strengths include leadership with both technical and first line management. Well versed with collaboration across geographies ( Israel, Malaysia, India, Folsom, Mexico, North Carolina) to deliver to aggressive timelines. Specialties: macOS Release, SW triage, priority decision/management, Risk taking to align with Schedule, managing cross functional dependencies, Power and Performance Engineering, Virtual/Mixed/Augmented Reality, Leadership, Management, Mentor, Collaboration, Teamwork, Silicon, Microprocessors, Hiring, Employee Development, Technical Leadership, Project Management, Graphics, Linux, Kernel Drivers, Validation Methodologies, Software/Hardware Debug, Test-plan Development, SCRUM/Agile methodology, Scrum Master, Product Owner

Country

united states

City

cupertino

Industry

consumer electronics

Skill

debugging, microprocessors, technical leadership, processors, team management, embedded systems, hardware architecture, device drivers, project management, linux, development of employees, scrum master, computer architecture, linux kernel, scrum, intel gen graphics, multi cultural team building, testing, product owner, scrum/agile methodology, collobration, hands on technical leadership

Experience

macos release validation and sw triage manager

system engineer intern

nike

2005-6 - 2005-8 · 3 mos

* Analyzed current workflows and the current Sarbanes-Oxley Act (SOX) process. * Gathered user requirements from analysts and end users. * Created functional specification documents, test plans, training material for the new process in place and prototypes the GUI.

applications engineer intern

nike

2004-6 - 2004-8 · 3 mos

Gathered user requirements from Global Trade (GT) IT end users, created a functional specification document. - Implemented the enhancements in JAVA using STRUTS architecture.

macos release validation and engineering manager

apple

2017-9 - Present · 9 yrs 1 mo

Dedicated manager, experienced in leading high-performing and skilled teams while encouraging employee creativity and career growth. Lead high quality macOS releases as well as triage of macOS, iOS, tvOS and watchOS SW. Strong technical understanding of software development and QA, specifically software defect tools and processes. Adept at navigating the decision cycle process and managing cross-functional communication and technical dependencies with other teams (dev, QA, etc.) together. Engineering Project Manager for memory performance tiger team for next major iOS release.

hw validation and sw engineer

intel corporation

2006-6 - 2011-12 · 5 yrs 7 mos

Team lead for the internal Linux and concurrency tools team for Haswell client. Responsible for delivering high quality tool to post-silicon validation content teams cross sites. As well as developing and driving new POR concurrency application for graphics and driving coverage for false failure reduction. Developed coverage automation framework in Perl/Python as a pioneer method for collecting and comparing coverage results in post-silicon validation. Owner for validation system power-management states and Isochronous display/audio traffic on Gen4 Intel architecture. Developed Linux kernel core/uncore/chipset drives for Gen4 Intel architecture.

power and performance engineering manager

intel corporation

2015-10 - 2017-8 · 1 yr 11 mos

Managed a team of power and performance (PnP) engineers by creating a trusting and open team culture, to successfully deliver on technical readiness PnP features in strict deadlines to impact product architecture and launch. Transformed the team from a primarily execution mindset to a technical readiness mindset impacting architecture changes for future Intel products. Lead the team in new emerging market segments (i.e. AR/VR/MR, Optane) from a power and performance architecture analysis point. Created cross-geo synergy for the org on KPI hand-off, key learning's for post-mortem analysis, and driving key decisions for automation direction.

test tools development manager

intel corporation

2012-1 - 2015-10 · 3 yrs 10 mos

Responsible for managing test tools development team to deliver high quality test framework and content to product teams for validation. Creating synergy and collaboration with cross-site teams and customers to ensure test development team and customers align on requirements and timelines. Driving team to ensure team deliverable are met by reducing interruptions and removing road blocks. Chairing and driving technical meetings with developers and customers to find solutions on technical obstacles.