Chirag Sakhuja

I hold office hours and grade assignments for a graduate-level compilers course (Structure & Implementation of Modern Programming Languages).

I conducted research as a PhD student on automated design of hardware for AI.

I have assisted with teaching Computer Architecture, Intro to Computer Architecture, and Software Design. For each class, I developed assignments and exams, taught groups of 20-30 students in discussion sections, and explained concepts on a one-on-one basis in office hours.

I developed and taught the supplemental classes Introduction to Linux and Introduction to Python. Each class deep-dived into specific topics with the focus of preparing students for industry work in the field. Creating these courses motivated the department to introduce a series of supplemental, single-focus courses taught by faculty to teach skills students would typically have to learn on their own time.

I implemented new ray tracing features in a performance model, and I used the model to conduct performance analysis.

I designed and implemented a unit-level testbench around the Texture Processing Unit and used the test-bench to compare performance against RTL and the microarchitectural spec.

I was on the TPC architecture team and ran performance experiments at a TPC level and full-chip level. Much of my focus was on design exploration and performance modeling of the first-generation ray tracing unit (RTCore).

I focused on two primary projects throughout the summer. My first project was to create a trace of the memory requests going into and coming out of the L2 and then design and implement a unit-level testbench around the L2 prefetchers to replay the trace. The unit-level testbench allowed me to run large performance tests on variations of the prefetchers to help improve full-chip performance. My second project was to write boilerplate assembly code that can restore the architectural state of the machine from a checkpoint. This was useful in pausing and resuming large test programs and comparing performance against multiple architectures (i.e. architectures that could not previously restore from the custom checkpoint format).

I primarily worked on verification at the top-level of the GPU. This work consisted of adding logging and coverage in UVM, improving a tool to help debug the RTL and functional models, and actually debugging the RTL. I learned how to use SystemVerilog as well as common techniques used in processor verification.

I increased functionality of existing test infrastructure to support test automation of Skype clients and core libraries. This involved rearchitecting part of the existing infrastructure to improve efficiency. I learned how to use C# and much more about how quality testing is done.

I mostly performed regression testing on a model for a chip and designed various debugging utilities to be used internally. I also spent some time making modifications to a system model and designing a simulator and visualizer for a cache model. I learned x86, Ruby (and Ruby on Rails), and the stages a processor goes through before production.

I tutored small groups of students on a walk-in basis for Intro to Computing and Intro to Embedded Systems.