BHOOMIKA KILARI

Part of the Data Movement Verification team!

• Worked on DDR5‑PHY verification with ownership of functional coverage and enhancement of verification flow. • Analyzed functional coverage of RDIMM and executed directed and randomized test cases to achieve coverage goals. • Collaborated with Firmware, VIP teams to review specifications and debugged DFI‑related issues using waveforms,logs. • Actively monitored regressions to flag new issues by assisting in tracking bugs and implemented new features in the System Verilog environment. • Developed Python automation scripts to generate summary reports, which enabled efficient bug tracking and accelerated verification tasks.

• Associated with the UCIE IP team, gained valuable exposure to industry workflows and best practices. • Wrote System Verilog Assertions for design-related wrappers. • Developed Python scripts to automate verification tasks, streamline regression triage, and improve data visualization. • Worked on developing UVM sequences for error-checking registers to validate design integrity.

Introduction to System Verilog Microprocessor System Design Fundamentals of Pre-Si Verification Introduction to Computer Architecture Formal verification ASIC Verification