bharti dadhich

Career Objective To seek quality environment that will serve as a platform to learn and enhance my professional skills as Design Engineer, where I can learn and utilize my potential for the promotion and growth of the organization through proven performance. Skill Set: Software Skills: Verilog, VHDL, SKILL, PSpice Tools: * Cadence : Virtuoso - Schematic Editor, Layout Suite, Analog Design Environment, Virtuoso Layout Migrate Routers -Virtuoso Chip Assembly Router Cadence, Space-Based Router Assura - Physical Verification, Cadence Physical Verification System Cadence-SOC-Encounter : Floorplan, Placement & Routing, Timing Analysis. * Model Formatting and different process nodes migration flow development. * Mentor CALIBRE for validation - DRC, LVS ,DFM ,PERC-LDL,MRC,XOR,LPE,QRC and Modelsim. * Internal tool Naku for frontend and backend flow