Bhargav Sriram
EDA Infrastructure(Physical Design) Intern @ Marvell Technology
About
I am currently working on the tape-out of a custom RISC-V processor where the fabrication will be funded by Apple Inc.I am an enthusiastic and dedicated engineering student with a well-defined understanding of core concepts in Electrical and Electronics Engineering.Looking to get into the field of hardware engineering specifically Physical Design ,Design Verification engineer roles or RTL design roles.Proficient in using tools like Cadence Virtuoso and ModelSim.Proficient using Hardware Description Languages(HDL) like Verilog and SystemVerilog.Diligent and hardworking individual possessing superior communication skills.
United States
New York
Computer Software
SystemVerilog, Cadence Innovus, Physical Design, Static Timing Analysis, Analog Circuit Design, SystemC, C (Programming Language), Cadence Virtuoso, Cadence Spectre, Cadence Virtuoso Layout Editor, Verilog, RTL Design, Hardware Solutions, Digital Logic, VLSI, Advanced Logic Design, Computer Architecture, System on a Chip (SoC), Neural Networks, Blockchain
Experience
EDA Infrastructure(Physical Design) Intern
Marvell Technology
Santa Clara, California, United States
1.Performed Power, Performance, and Area (PPA) analysis on ALU, VCU, and FPU blocks using Marvell’s custom flow across multiple versions of Cadence Innovus and collaborated with Cadence Representatives to identify critical tool bugs 2.Reduced the area of the VCU block by 20% through floorplan-level optimizations and custom pin placement 3.Executed IR drop analysis across the ALU block, VCU block and FPU block and implemented optimizations to reduce the IR drop across these blocks 4.Developed a Python automation script to collect and compare frequency, power, and area metrics across advanced technology nodes (TSMC 3 nm, 2 nm, and A16)
Research And Development Intern
Indian Institute of Science (IISc)
Bengaluru, Karnataka, India
Worked under Professor Suresh on control strategies and optimization methods for individual and community microgrids.Researched about various time-series forecasting models such as Long-Short Term Memory(LSTM) which is an enhanced version of a Recurrent Neural Network(RNN) and worked towards implementing a Physics Informed Neural Network to predict output power from a PV cell.
Product Development Intern
Ashok Leyland
Chennai, Tamil Nadu, India
Worked on a project "Road-Block Detection" using Raspberry Pi.Performed sensor synchronisation and data visualisation using time-series analytics.Performed research on various accelerometers and a pi camera and methods to synchronise them such that they collect data at the same rate.
Student Coordinator
graVITas VIT Vellore
Vellore, Tamil Nadu, India
Volunteered as a Student Coordinator to help conduct one of the biggest technical fests in India, Gravitas.
Education
Columbia University
Electrical and Electronics Engineering
Spring’25 Coursework: -VLSI Design Laboratory(ELEN 6350E) -Embedded Scalable Platforms -Embedded Systems -Embedded AI Fall’24 Courses: -Digital VLSI Circuits -Advanced Logic Design -System On Chip Platforms -Computer Architecture
Vellore Institute of Technology
Electrical and Electronics Engineering
Grade: 3.76/4.00
Chettinad Vidyashram
Mathematics and Computer Science
Bhargav Sriram's Contact Information
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