Balaji Venkataramana
Hardware Architect @ Google
About
I have strong interest and background in the field of Computer Architecture. I am pursuing my Masters in ECE at UW Madison (Computer Architecture Track).
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United States
Semiconductors
Programming, Verilog, C++, Python (Programming Language), Computer Architecture, SystemVerilog, FIFO, LTSpice, Pytorch, Matlab
Experience

Research Intern
Germany
Exploration of Cross-Layer Approximation for Artificial Neural Networks on FPGAs 1) Approximations explored in tasks with high hardware complexity such as multiplication, division, sine function and log compression. - Multiplication - Minimally Biased Approximate Integer Multiplier (MBM) - Division - SIMDive approximate division algorithm (inspired from Mitchell's approximation) - Log-compression - Approx log-compression function - Sin function - CORDIC algorithm 2) Approximations applied over 3 Deep Neural Networks targeted at different problems - DenseNet (Mobilenetv2 backbone) - Encoder decoder architecture - Single Image Depth Estimation - DexiNed - Upsampling + CNN architecture - Edge Detection - SincNet - KWS (Key Word Spotting over raw audio data)
Education

Electrical and Computer Engineering
ECE752: Advanced Computer Architecture-I [Single Core Architectures, Out-of-Order Superscalar] ECE757: Advanced Computer Architecture-II [Multi-core Architectures, Coherence, Consistency] ECE755: VLSI Systems Design [CMOS characteristics, Power-Performance-Area Tradeoff, STA, Memories] ECE759: High Performance Computer Architecture [CUDA, OpenMP, GPU Architecture] CS557: Parallel & Throughput Optimized Computing CS537: Intro to Operating Systems ECE532: Matrix Methods for Machine Learning ECE552: Intro to Computer Architecture CS758: Quantum Systems
Balaji Venkataramana's Contact Information
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