Aryan Kannaujiya
Senior Research Fellow @ Indian Institute of Technology Jammu
About
I’m Aryan Kannaujiya, a PhD Scholar in VLSI Design at IIT Jammu and a Senior Research Fellow (SRF) working in advanced digital/analog circuit design (Logic/Layout designer). My research focuses on noise-immune and soft error-resilient architectures for reliable computing in harsh environments. I have hands-on experience with multiple chip tapeouts, including: • Noise-immune Schmitt Trigger @ 180 nm • 4 KB Memory Architecture @ 180 nm • 8-bit Counter @ 130 nm Passionate about circuit reliability, low-power design, and practical silicon implementation, I aim to contribute to cutting-edge semiconductor research and innovation.
India
Jammu & Kashmir
Higher Education
SRAM, RTL Design, Analog Layout, Analog Engineer, Physical Design, Financial Consulting, Financial ServicesFinancial Services, Financial Reports, Financial Accounting, Financial Analysis, Teamwork, Interpersonal Communication, Technical Exchange, Data Structures, semiconductor, Cloud Computing, Technical Troubleshooting, MS Excell, Power Point, MS Word
Experience
Senior Research Fellow
Indian Institute of Technology Jammu
Jammu, Jammu & Kashmir, India
Chairperson - IEEE CASS Student Branch Chapter (SBC11545F)
IEEE Circuits and Systems Society (CASS)
Jammu, Jammu & Kashmir, India
Vice Chairperson - IEEE CASS Student Branch Chapter (SBC11545F)
IEEE Circuits and Systems Society (CASS)
Jammu, Jammu & Kashmir, India
IEEE & CASS - Graduate Student Member (School Code: 1-6606J9M)
IEEE
India
IEEE and CASS, Graduate Student Member, Region: R10 -Asia and Pacific IEEE Membership ID: 96394356
IEEE & CASS - Graduate Student Member (School Code: 1-6606J9M)
IEEE
India
IEEE and CASS, Graduate Student Member, Region: R10 -Asia and Pacific IEEE Membership ID: 96394356
Advance Mathematics Solver
Chegg India
Mathematics Tutor
Textbooks.com
Postal Assistant (H.O), Department of Post-Government of India
Department of Posts, India
Kasaragod, Kerala, India
I have to deal Govt. funds, accounts and banking, and communicate and assign task to mailer, sender, and postman.
Education
Indian Institute of Technology Jammu
VLSI Design
Radiation Hardened VLSI Circuits
Madan Mohan Malaviya University of Technology
Digital System
Central Hindu Boys School
10+2
Aryan Kannaujiya's Contact Information
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