Arun Raja Manjini
GPU Validation Sr. Engineer @ Qualcomm
About
I thrive on the challenges of silicon bring-up and power-on processes, adeptly triaging failures to debug and root out complex RTL, firmware, and architectural issues. My role is instrumental in enabling powerful computing solutions while fostering a passion for functional validation and a commitment to learning new technologies that change our world. With the latest collaboration on AI Cluster debug and bring-up on AI Accelerator Fabric with Scale-up and Scale-out feature validation on Networking, PCIe, PnP with MLPerf workloads was new start for my long term career.
United States
San Diego
Semiconductors
Test Bench, Scoreboard, Root Cause, Skill Development, Google Slides, Presentations, Sales Engineering, Digital twin, Presentation Skills, Team Leadership, Communication, Natural Language Processing (NLP), LangChain, RAG, docker, Sales, RISC, X86, Data Centers, Functional Verification
Experience
GPU Validation Sr. Engineer
Qualcomm
GPU Validation - Power
SoC Validation Engineer
Intel
Hillsboro, Oregon, United States
Post-Si Server CPU Validation Engineer working on Xeon 6 (GNR). -> Coherency Domain Validation - Test planning and Coverage. -> Silicon bring-up/power-on - BIOS knobs Validation and Feature enabling. -> Triage of failures in Volume Validation - TOR TO debugs, PM sideband TO. -> Performance counters - Emon tools for perf analysis. -> DTTC Presenter - Breker PSS tool on Xeon 6 Gaudi3 - Rack Scale-up Power-on -> On Ubuntu Software Validation on UBB with 8 OAM cards. -> PCIe Debug on scale-up issues - Card not training to Gen5 or link down -> Characterization and Triage through JIRA Customer Issues Debug - L1 -> Benchmarks: SpecPower, Llama 3 training/ inference WL, Deepseek R1 full model inference with BF16 with CPU, Gaudi3 AI Accelerators and NVIDIA H100 GPGPUs. -> Emon tools analysis for perf improvement -> Core pipeline characterization - Front-end bound, Back-end bound, and Memory-bound. -> Autonomous Crash Dump Analysis/ Review for Customer Fleet Debug, and enhancements.
Assistant System Engineer - Trainee
Tata Consultancy Services
Hyderabad Area, India
Education
Texas A&M University-Kingsville
Electrical Engineering
Improving my problem-solving attitude and solving the ambiguous questions for this world. Following Moore's Law - Semiconductor, VLSI, RTL- Verilog, SystemVerilog, UVM, STA
Sri Manakula Vinayagar Engineering College
Electronics and Communications Engineering
Petit Seminaire Higher Secondary School
Arun Raja Manjini's Contact Information
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