
Archana Raut
Component Design Engineer
About
18yrs of experience in leading verification efforts across SOC, subsystem, IP level, delivered multiple successful products for Intel, LSI, Synopsis, Virage Logic, Ingot System, Alliance semiconductor . Key area of expertise: * Cache coherency validation of multi-core server processors and network processors ( Intel's server and client coherent fabric, ARM cache coherent network interconnect CCN512) * System memory controller ( DDR2/3, LPDDR/LPDDR2) * PCI-E, PCI/PCIX to PCI-E bridge * AXI, AHB, APB * In-field repair, power on repair and DFT verification of network processors * Hands on experience in verification environment development ( System verilog, VMM, OVM, UVM)
India
Bengaluru
Semiconductors
Computer Architecture, Coverage Analysis, Functional Verification, ASIC, Application-Specific Integrated Circuits (ASIC), Verilog, Debugging, SoC, System on a Chip (SoC), SystemVerilog
Experience

Component Design Engineer
Intel India Ltd
Archana Raut's Contact Information
Phone
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