Andy Lim

Test Engineering Lead @ Teradyne

About

Test Engineering with over 10 years of comprehensive experience in semiconductor ATE platforms, PCBA functional testing, high‑volume manufacturing, and hardware sustaining engineering. Proven success managing and developing test engineering teams, driving yield improvements, optimizing test coverage, executing root‑cause analysis, and collaborating with global R&D, product engineering, and Contract Manufacturers (CMs) in Asia. Strong background in PCIe board‑level products, digital/mixed‑signal hardware, and NPI validation.Core Competencies: • Test Engineering Management & Team Leadership• PCBA Functional Test | Test Coverage & Test Limits• NPI Correlation, Validation & Production Ramp• High‑Volume Manufacturing (HVM) & CM Coordination• Yield Improvement, DPPM Monitoring & Cost Reduction• Failure Analysis (FA), RCCA & Field Return Debug• PCIe, Power, Digital/Mixed‑Signal Hardware• ECN/Deviation Process Management• ATE Systems: Teradyne ETS (Power) and SOC (Compute) & Advantest V93K• Automation (Perl, Java, C++), Test Methodology• Cross‑Functional Communication (US/Costa Rica/Asia Teams)

Country

Malaysia

City

Penang

Industry

Semiconductors

Skill

Cross-functional Team Leadership, Team Development, Creative Problem Solving, Continuous Improvement, Hands-on Technical, Strategic Thinking, Customer Satisfaction

Experience

Test Engineering Lead

Teradyne

2023-4 - Present · 3 yrs 6 mos

Penang, Malaysia

Leading global ATE operations, improving PCBA yields, and driving FA/RCCA with CMs. Strong in defining test coverage and optimizing test flows from NPI to HVM. Proven people leader with cross‑functional collaboration skills and expertise in lab CAPEX planning and JIRA‑based test tracking.

Test Engineer

Teradyne

2015-7 - 2023-3 · 7 yrs 9 mos

Penang, Malaysia

Experienced in prototype validation, mixed‑signal/digital debug, and NPI ramp into high‑volume production. Skilled in PCBA yield reviews, test spec updates, and automation using Perl, Java, and C++. Collaborated with FPGA and memory design teams on board bring‑up and system integration.

Test Module Engineer

Intel

2012-10 - 2014-9 · 2 yrs

Penang, Malaysia

Supported V93K testers and board‑level test hardware, developed calibration programs and documentation, and trained technicians to ensure reliable test operations.