alex michel

software engineer ii

About

As a recent graduate from the University of Portland with a Bachelor of Science in Electrical Engineering, I have a solid understanding of several programming languages, developing and executing test suites, and low power chip designs. In both professional and academic environments, I have been part of successful working groups. My strengths include an excellent work ethic, desire and aptitude to learn new things, the ability to work through tough problems, and the diligence to find solutions to those problems.

Country

united states

City

portland

Industry

electrical/electronic manufacturing

Skill

c/c++, matlab, microsoft office, teamwork, microsoft excel, c++, computer programming, embedded systems, powerpoint, microsoft word, verilog, research, data analysis, python, assembly language, linux, digital circuit design, analog circuit design, circuit analysis

Experience

software engineer ii

raytheon

software engineer

sicdrone

2016-1 - Present · 10 yrs 9 mos

intern

synopsys

2012-6 - 2012-8 · 3 mos

* Stress test VC Static Formal Analysis tool * Design test cases in Verilog and run through the tool * Compare waveform output produced by the Verilog Simulator with known working tool * Save failed cases and submit bug reports * Write random Verilog generator in C++ to stress test simulator parser * Create test scripts that generate random Verilog and random properties; formally verify output. Failed tests saved for review. * Formal presentation of my work to the Synopsys VG group to wrap up internship