
Aditya Warnulkar
Staff Engineer (GPU) @ Qualcomm
About
Currently working on Architecture and Development of Power Management Unit for Qualcomm Adreno Graphics. 3 years of prior work experience as a Design Verification Engineer at QUALCOMM with emphasis on Multimedia Performance Verification.
United States
San Diego County
Wireless
Matlab, Perl, Verilog, C, NI LabVIEW, Embedded Systems, Digital Signal Processing, Programming, Communication, Windows, Research, Teamwork, Linear Algebra, Pattern Recognition, Microsoft Office, Microsoft Excel, PowerPoint, Microsoft Word, English, C++
Experience

Summer Intern (GPU Design Team)
Greater San Diego Area
Project 1: Exploring Architectural opportunities for Clock Gating in GPU Project 2: Development of synthesizable verilog transactor for "Power Control Bus" Project 3: Perform micro-architectural analysis of an IP inside GPU

Engineer (SOC Performance Verification)
Bangalore
1. Effectively shouldered the responsibility to develop and implement techniques to compute the performance of Multimedia Sub system of Qualcomm chipsets. Successfully implemented the “Simulation Acceleration” methodology for pre-silicon SOC level verification, at Qualcomm Bangalore, India. 2. Successfully setup a Pre-silicon flow to extract Multimedia performance parameters for Qualcomm Snapdragon chipsets designed in Bangalore, India. 3. Successfully handled Multimedia Performance Verification for five “Qualcomm Snapdragon” projects. For each project my responsibilities were to – Coordinate with architecture team and devise the “Multimedia performance” test plan. – Synthesize the design on Advanced Emulator (Mentor Graphics , Veloce). – Run the performance tests on emulation platform and analyze the Multimedia Performance data. – Correlate the results with Multimedia Architecture team, in-order to ensure the design behaves as per expectation.

Research Intern (RF Algo)
Bangalore
Interned in RF Algo team at National Instruments R&D centre, Bangalore. Project: Noise Figure measurement of Power Amplifiers. The objective of the project was to come up with signal processing technique to measure “Noise Figure” of power amplifiers. The idea of the project was to pass a intelligently devised reference signal through the power amplifier and then study the statistical variations in the output of the amplifier inorder to determine its Noise Figure. This technique has a tremendous cost advantage compared to traditional technique, which uses expensive ”Noise source” to measure noise figure. The project was successfully completed in the span of four months.
Education
Aditya Warnulkar's Contact Information
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