Aditya Warnulkar

Aditya Warnulkar

Staff Engineer (GPU) @ Qualcomm

About

Currently working on Architecture and Development of Power Management Unit for Qualcomm Adreno Graphics. 3 years of prior work experience as a Design Verification Engineer at QUALCOMM with emphasis on Multimedia Performance Verification.

Country

United States

City

San Diego County

Industry

Wireless

Skill

Matlab, Perl, Verilog, C, NI LabVIEW, Embedded Systems, Digital Signal Processing, Programming, Communication, Windows, Research, Teamwork, Linear Algebra, Pattern Recognition, Microsoft Office, Microsoft Excel, PowerPoint, Microsoft Word, English, C++

Experience

Qualcomm

Staff Engineer (GPU)

Qualcomm

LinkedIn
2022-10 - Present · 4 yrs

San Diego, California, United States

Qualcomm

Senior Design Engineer (GPU)

Qualcomm

LinkedIn
2019-11 - 2022-10 · 3 yrs

Greater San Diego Area

Currently working on modeling and design of Graphics Power Management solutions for Qualcomm Adreno Graphics.

Qualcomm

Design Engineer (GPU)

Qualcomm

LinkedIn
2018-2 - 2019-10 · 1 yr 9 mos

Greater San Diego Area

Qualcomm

Summer Intern (GPU Design Team)

Qualcomm

LinkedIn
2017-5 - 2017-8 · 4 mos

Greater San Diego Area

Project 1: Exploring Architectural opportunities for Clock Gating in GPU Project 2: Development of synthesizable verilog transactor for "Power Control Bus" Project 3: Perform micro-architectural analysis of an IP inside GPU

Qualcomm

Engineer (SOC Performance Verification)

Qualcomm

LinkedIn
2014-10 - 2016-7 · 1 yr 10 mos

Bangalore

1. Effectively shouldered the responsibility to develop and implement techniques to compute the performance of Multimedia Sub system of Qualcomm chipsets. Successfully implemented the “Simulation Acceleration” methodology for pre-silicon SOC level verification, at Qualcomm Bangalore, India. 2. Successfully setup a Pre-silicon flow to extract Multimedia performance parameters for Qualcomm Snapdragon chipsets designed in Bangalore, India. 3. Successfully handled Multimedia Performance Verification for five “Qualcomm Snapdragon” projects. For each project my responsibilities were to – Coordinate with architecture team and devise the “Multimedia performance” test plan. – Synthesize the design on Advanced Emulator (Mentor Graphics , Veloce). – Run the performance tests on emulation platform and analyze the Multimedia Performance data. – Correlate the results with Multimedia Architecture team, in-order to ensure the design behaves as per expectation.

Qualcomm

Associate Engineer (Multimedia Performance Verification)

Qualcomm

LinkedIn
2013-6 - 2014-10 · 1 yr 5 mos

Bangalore, India

Worked as a Design verification engineer for Multimedia Subsystem of Qualcomm SoC

NI (National Instruments)

Research Intern (RF Algo)

NI (National Instruments)

LinkedIn
2013-1 - 2013-5 · 5 mos

Bangalore

Interned in RF Algo team at National Instruments R&D centre, Bangalore. Project: Noise Figure measurement of Power Amplifiers. The objective of the project was to come up with signal processing technique to measure “Noise Figure” of power amplifiers. The idea of the project was to pass a intelligently devised reference signal through the power amplifier and then study the statistical variations in the output of the amplifier inorder to determine its Noise Figure. This technique has a tremendous cost advantage compared to traditional technique, which uses expensive ”Noise source” to measure noise figure. The project was successfully completed in the span of four months.

Education

University of Southern California

University of Southern California

LinkedIn

Electrical Engineering

2016 - 2018 · 2 yrs

Focussed towards Multimedia , Computer Architecture and Machine Learning

PES University

PES University

LinkedIn

Electronics and Communications Engineering

2009 - 2013 · 4 yrs

Research Thesis : "Projection based approached for interference cancellation in OFDM system"

Aditya Warnulkar's Contact Information

Email

******@***.com

Phone

(**) *** ****

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