Aditya Shiggavi
ASIC Design Engineer @ Western Semiconductor
About
ASIC Design Engineer specializing in power optimized microarchitecture design for RISC-V cores. Committed to advancing power-aware ASIC design from microarchitecture exploration through physical implementation for next generation computing, AI, and accelerator platforms.
United States
Tempe
Semiconductors
-
Experience
ASIC Design Engineer
Western Semiconductor
Arizona, United States
Education
University of Wisconsin-Madison
Electrical and Computer Engineering
Coursework: Digital System Design and Synthesis Introduction to Computer Architecture Advanced Computer Architecture VLSI Systems Design High Performance Computing Design Automation of Digital Systems
Vellore Institute of Technology
Electrical and Electronics Engineering
Aditya Shiggavi's Contact Information
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